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New state RX_L_ADDR; loop load adaption
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@ -89,18 +89,23 @@ enum {
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//rx states
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enum {
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RX_WAIT_START,
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RX_L_ADDR,
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RX_L_DATA,
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RX_WAIT_EOP
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};
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#define EOP_TIMEOUT 2 //milli seconds; end of layer-2 packet gap
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#define EOPR_TIMEOUT 8 //ms; relaxed EOP timeout; usally to trigger after NAK
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#define CONFIRM_TIMEOUT 500 //milli seconds
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#define RESET_TIMEOUT 100 //milli seconds
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#define TX_THROTTLE_TIME 1 //milli seconds
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#define TX_TIMEPAUSE 0 // 0 means 1 milli seconds
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// If this threshold is reached loop() goes into
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// "hog mode" where it stays in loop() while L2 address reception
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#define HOGMODE_THRESHOLD 3 // milli seconds
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void TpUartDataLinkLayer::loop()
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{
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if (!_enabled)
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{
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if (millis() - _lastResetChipTime > 1000)
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@ -117,12 +122,29 @@ void TpUartDataLinkLayer::loop()
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// Signals to communicate from rx part with the tx part
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bool isEchoComplete = false; // Flag that a complete echo is received
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uint8_t dataConnMsg = 0; // The DATA_CONN message just seen or 0
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#ifdef KNX_WAIT_FOR_ADDR
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// After seeing a L2 packet start, stay in loop until address bytes are
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// received and the AK/NAK packet is sent
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bool stayInRx = true;
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#elif defined(KNX_AUTO_ADAPT)
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// After seeing a L2 packet start, stay in loop until address bytes are
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// received and the AK/NAK packet is sent, when last loop call delayed
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// by more than HOGMODE_THRESHOLD
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bool stayInRx = millis() - _lastLoopTime > HOGMODE_THRESHOLD;
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_lastLoopTime = millis();
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#else
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// After seeing a L2 packet start, leave loop and hope the loop
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// is called early enough to do further processings
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bool stayInRx = false;
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#endif
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// Loop as long we are in the receive phase for the L2 address
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do {
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_receiveBuffer[0] = 0x29;
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_receiveBuffer[1] = 0;
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uint8_t* buffer = _receiveBuffer + 2;
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uint8_t rxByte;
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bool isEOP = (millis() - _lastByteRxTime > EOP_TIMEOUT); // Flag that an EOP gap is seen
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switch (_rxState)
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{
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case RX_WAIT_START:
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@ -143,7 +165,7 @@ void TpUartDataLinkLayer::loop()
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_xorSum ^= rxByte;
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_RxByteCnt++; //convert to L_DATA_EXTENDED
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_convert = true;
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_rxState = RX_L_DATA;
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_rxState = RX_L_ADDR;
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#ifdef DBG_TRACE
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println("RLS");
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#endif
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@ -154,7 +176,7 @@ void TpUartDataLinkLayer::loop()
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buffer[_RxByteCnt++] = rxByte;
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_xorSum ^= rxByte;
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_convert = false;
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_rxState = RX_L_DATA;
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_rxState = RX_L_ADDR;
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#ifdef DBG_TRACE
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println("RLX");
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#endif
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@ -232,11 +254,11 @@ void TpUartDataLinkLayer::loop()
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}
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}
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break;
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case RX_L_DATA:
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if (isEOP)
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case RX_L_ADDR:
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if (millis() - _lastByteRxTime > EOPR_TIMEOUT)
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{
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_rxState = RX_WAIT_START;
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print("EOP inside RX_L_DATA");
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print("EOPR inside RX_L_ADDR");
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printHex(" => ", buffer, _RxByteCnt);
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break;
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}
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@ -247,20 +269,12 @@ void TpUartDataLinkLayer::loop()
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#ifdef DBG_TRACE
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print(rxByte, HEX);
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#endif
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if (_RxByteCnt == MAX_KNX_TELEGRAM_SIZE)
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{
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_rxState = RX_WAIT_EOP;
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println("invalid telegram size");
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}
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else
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{
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buffer[_RxByteCnt++] = rxByte;
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}
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_xorSum ^= rxByte;
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if (_RxByteCnt == 7)
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{
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//Destination Address + payload available
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_xorSum ^= rxByte;
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//check if echo
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if (_sendBuffer != nullptr && (!((buffer[0] ^ _sendBuffer[0]) & ~0x20) && !memcmp(buffer + _convert + 1, _sendBuffer + 1, 5)))
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{ //ignore repeated bit of control byte
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@ -299,8 +313,28 @@ void TpUartDataLinkLayer::loop()
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// We don't have to update _lastByteTxTime because after ACK the timing is not so tight
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_platform.writeUart(c);
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}
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_rxState = RX_L_DATA;
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}
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else if (_RxByteCnt == buffer[6] + 7 + 2)
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break;
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case RX_L_DATA:
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if (!_platform.uartAvailable())
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break;
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_lastByteRxTime = millis();
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rxByte = _platform.readUart();
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#ifdef DBG_TRACE
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print(rxByte, HEX);
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#endif
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if (_RxByteCnt == MAX_KNX_TELEGRAM_SIZE)
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{
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_rxState = RX_WAIT_EOP;
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println("invalid telegram size");
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}
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else
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{
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buffer[_RxByteCnt++] = rxByte;
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}
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if (_RxByteCnt == buffer[6] + 7 + 2)
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{
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//complete Frame received, payloadLength+1 for TCPI +1 for CRC
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if (rxByte == (uint8_t)(~_xorSum))
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@ -339,7 +373,7 @@ void TpUartDataLinkLayer::loop()
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}
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break;
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case RX_WAIT_EOP:
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if (isEOP)
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if (millis() - _lastByteRxTime > EOP_TIMEOUT)
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{
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_RxByteCnt = 0;
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_rxState = RX_WAIT_START;
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@ -359,7 +393,7 @@ void TpUartDataLinkLayer::loop()
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default:
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break;
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}
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} while (_rxState == RX_L_DATA);
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} while (_rxState == RX_L_ADDR && (stayInRx || _platform.uartAvailable()));
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// Check for spurios DATA_CONN message
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if (dataConnMsg && _txState != TX_WAIT_CONN && _txState != TX_WAIT_ECHO) {
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@ -379,7 +413,7 @@ void TpUartDataLinkLayer::loop()
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}
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break;
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case TX_FRAME:
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if (millis() - _lastByteTxTime >= TX_THROTTLE_TIME)
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if (millis() - _lastByteTxTime > TX_TIMEPAUSE)
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{
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if (sendSingleFrameByte() == false)
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{
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@ -44,6 +44,7 @@ class TpUartDataLinkLayer : public DataLinkLayer
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uint8_t _xorSum = 0;
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uint32_t _lastByteRxTime;
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uint32_t _lastByteTxTime;
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uint32_t _lastLoopTime;
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uint32_t _waitConfirmStartTime;
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uint32_t _lastResetChipTime = 0;
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