mirror of
https://github.com/thelsing/knx.git
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d90843ba45
* Initial commit * Clean up * Remove display code * Change cmake build * Add SimpleLink SDK for CC13xx/CC26xx as submodule * Remove commented line from build.sh * Working build * Remove SDK submodule * Squashed 'examples/knx-cc1310/coresdk_cc13xx_cc26xx/' content from commit 0d78d32 git-subtree-dir: examples/knx-cc1310/coresdk_cc13xx_cc26xx git-subtree-split: 0d78d3280357416a5c0388148cda13717c9ffaa5 * Add more comments and enable Power_idleFunc() for NoRTOS variant. Internal SDK driver functions which have to wait for something will cause Power_idleFunc to be called instead of doing busy wait. * Move CC1310 platform init around * Optimize a bit more in debug build config as the binary does not fit into 128Kb flash otherwise. * Explicitly list each source/header file in build config. Use linker group to resolve circular dependencies. * Ignore vscode settings.json * Increase stacks size * Only compile CC1310 source code if #define DeviceFamily_CC13X0 * initial commit of CC1310 RF driver with first working RX version * Better handling of buttonUp() across platforms * Start cleanup * continue cleanup * Fix bau2920 compilation * Continue cleanup * Fix compilation in other examples * Fix compilation * htons() and ntohs() only for SAMD and STM32, but not for Linux and ESP8266 and ESP32 * htons(9 and ntohs() needed for CC13x0 * Continue cleanup * Add CC1310 platform to CI * Fix CI * Use more recent toolchain from ARM * Fix travis * Use Ubuntu Focal * Fix toolchain for travis * Fix package name * Fix toolchain * Add libstdc++-dev package * Add newlib packages * Remove commented commands from CI * Fix travis * Fix compilation of knxPython * Clean up linefeeds * Fix RX callback * Move RF CRC16-DNP to bits.cpp * Fix TX * Optimization: do not calc CRC for block1 again in rf_data_link_layer * Make newline optional in printHex * Cleanup. First working version: ETS5 programming of individual address via KNX/RF coupler. * Use LEDs and Buttons to control ProgMode and Flash Erase * Remove settings.json (VScode) * Add README.md * Update README.md * Update README.md * Fix typo
242 lines
11 KiB
ArmAsm
242 lines
11 KiB
ArmAsm
/*********************************************************************
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* (c) SEGGER Microcontroller GmbH *
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* The Embedded Experts *
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* www.segger.com *
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**********************************************************************
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-------------------------- END-OF-HEADER -----------------------------
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File : SEGGER_RTT_ASM_ARMv7M.S
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Purpose : Assembler implementation of RTT functions for ARMv7M
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Additional information:
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This module is written to be assembler-independent and works with
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GCC and clang (Embedded Studio) and IAR.
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*/
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#define SEGGER_RTT_ASM // Used to control processed input from header file
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#include "SEGGER_RTT.h"
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/*********************************************************************
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*
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* Defines, fixed
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*
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**********************************************************************
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*/
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#define _CCIAR 0
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#define _CCCLANG 1
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#if (defined __SES_ARM) || (defined __GNUC__) || (defined __clang__)
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#define _CC_TYPE _CCCLANG
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#define _PUB_SYM .global
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#define _EXT_SYM .extern
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#define _END .end
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#define _WEAK .weak
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#define _THUMB_FUNC .thumb_func
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#define _THUMB_CODE .code 16
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#define _WORD .word
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#define _SECTION(Sect, Type, AlignExp) .section Sect ##, "ax"
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#define _ALIGN(Exp) .align Exp
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#define _PLACE_LITS .ltorg
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#define _DATA_SECT_START
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#define _C_STARTUP _start
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#define _STACK_END __stack_end__
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#define _RAMFUNC
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//
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// .text => Link to flash
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// .fast => Link to RAM
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// OtherSect => Usually link to RAM
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// Alignment is 2^x
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//
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#elif defined (__IASMARM__)
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#define _CC_TYPE _CCIAR
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#define _PUB_SYM PUBLIC
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#define _EXT_SYM EXTERN
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#define _END END
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#define _WEAK _WEAK
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#define _THUMB_FUNC
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#define _THUMB_CODE THUMB
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#define _WORD DCD
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#define _SECTION(Sect, Type, AlignExp) SECTION Sect ## : ## Type ## :REORDER:NOROOT ## (AlignExp)
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#define _ALIGN(Exp) alignrom Exp
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#define _PLACE_LITS
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#define _DATA_SECT_START DATA
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#define _C_STARTUP __iar_program_start
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#define _STACK_END sfe(CSTACK)
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#define _RAMFUNC SECTION_TYPE SHT_PROGBITS, SHF_WRITE | SHF_EXECINSTR
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//
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// .text => Link to flash
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// .textrw => Link to RAM
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// OtherSect => Usually link to RAM
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// NOROOT => Allows linker to throw away the function, if not referenced
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// Alignment is 2^x
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//
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#endif
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#if (_CC_TYPE == _CCIAR)
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NAME SEGGER_RTT_ASM_ARMv7M
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#else
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.syntax unified
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#endif
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#if defined (RTT_USE_ASM) && (RTT_USE_ASM == 1)
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#define SHT_PROGBITS 0x1
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/*********************************************************************
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*
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* Public / external symbols
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*
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**********************************************************************
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*/
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_EXT_SYM __aeabi_memcpy
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_EXT_SYM __aeabi_memcpy4
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_EXT_SYM _SEGGER_RTT
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_PUB_SYM SEGGER_RTT_ASM_WriteSkipNoLock
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/*********************************************************************
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*
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* SEGGER_RTT_WriteSkipNoLock
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*
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* Function description
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* Stores a specified number of characters in SEGGER RTT
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* control block which is then read by the host.
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* SEGGER_RTT_WriteSkipNoLock does not lock the application and
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* skips all data, if the data does not fit into the buffer.
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*
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* Parameters
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* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
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* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
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* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
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* MUST be > 0!!!
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* This is done for performance reasons, so no initial check has do be done.
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*
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* Return value
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* 1: Data has been copied
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* 0: No space, data has not been copied
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*
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* Notes
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* (1) If there is not enough space in the "Up"-buffer, all data is dropped.
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* (2) For performance reasons this function does not call Init()
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* and may only be called after RTT has been initialized.
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* Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
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*/
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_SECTION(.text, CODE, 2)
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_ALIGN(2)
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_THUMB_FUNC
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SEGGER_RTT_ASM_WriteSkipNoLock: // unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pData, unsigned NumBytes) {
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//
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// Cases:
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// 1) RdOff <= WrOff => Space until wrap-around is sufficient
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// 2) RdOff <= WrOff => Space after wrap-around needed (copy in 2 chunks)
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// 3) RdOff < WrOff => No space in buf
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// 4) RdOff > WrOff => Space is sufficient
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// 5) RdOff > WrOff => No space in buf
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//
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// 1) is the most common case for large buffers and assuming that J-Link reads the data fast enough
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//
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// Register usage:
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// R0 Temporary needed as RdOff, <Tmp> register later on
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// R1 pData
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// R2 <NumBytes>
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// R3 <Tmp> register. Hold free for subroutine calls
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// R4 <Rem>
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// R5 pRing->pBuffer
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// R6 pRing (Points to active struct SEGGER_RTT_BUFFER_DOWN)
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// R7 WrOff
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//
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PUSH {R4-R7}
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ADD R3,R0,R0, LSL #+1
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LDR.W R0,=_SEGGER_RTT // pRing = &_SEGGER_RTT.aUp[BufferIndex];
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ADD R0,R0,R3, LSL #+3
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ADD R6,R0,#+24
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LDR R0,[R6, #+16] // RdOff = pRing->RdOff;
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LDR R7,[R6, #+12] // WrOff = pRing->WrOff;
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LDR R5,[R6, #+4] // pRing->pBuffer
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CMP R7,R0
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BCC.N _CheckCase4 // if (RdOff <= WrOff) { => Case 1), 2) or 3)
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//
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// Handling for case 1, later on identical to case 4
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//
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LDR R3,[R6, #+8] // Avail = pRing->SizeOfBuffer - WrOff - 1u; => Space until wrap-around (assume 1 byte not usable for case that RdOff == 0)
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SUBS R4,R3,R7 // <Rem> (Used in case we jump into case 2 afterwards)
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SUBS R3,R4,#+1 // <Avail>
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CMP R3,R2
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BCC.N _CheckCase2 // if (Avail >= NumBytes) { => Case 1)?
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_Case4:
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ADDS R5,R7,R5 // pBuffer += WrOff
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ADDS R0,R2,R7 // v = WrOff + NumBytes
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//
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// 2x unrolling for the copy loop that is used most of the time
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// This is a special optimization for small SystemView packets and makes them even faster
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//
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_ALIGN(2)
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_LoopCopyStraight: // memcpy(pRing->pBuffer + WrOff, pData, NumBytes);
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LDRB R3,[R1], #+1
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STRB R3,[R5], #+1 // *pDest++ = *pSrc++
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SUBS R2,R2,#+1
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BEQ _CSDone
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LDRB R3,[R1], #+1
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STRB R3,[R5], #+1 // *pDest++ = *pSrc++
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SUBS R2,R2,#+1
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BNE _LoopCopyStraight
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_CSDone:
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#if _CORE_NEEDS_DMB // Do not slow down cores that do not need a DMB instruction here
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DMB // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the <WrOff> in the struct
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#endif
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STR R0,[R6, #+12] // pRing->WrOff = WrOff + NumBytes;
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MOVS R0,#+1
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POP {R4-R7}
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BX LR // Return 1
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_CheckCase2:
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ADDS R0,R0,R3 // Avail += RdOff; => Space incl. wrap-around
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CMP R0,R2
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BCC.N _Case3 // if (Avail >= NumBytes) { => Case 2? => If not, we have case 3) (does not fit)
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//
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// Handling for case 2
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//
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ADDS R0,R7,R5 // v = pRing->pBuffer + WrOff => Do not change pRing->pBuffer here because 2nd chunk needs org. value
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SUBS R2,R2,R4 // NumBytes -= Rem; (Rem = pRing->SizeOfBuffer - WrOff; => Space until end of buffer)
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_LoopCopyBeforeWrapAround: // memcpy(pRing->pBuffer + WrOff, pData, Rem); => Copy 1st chunk
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LDRB R3,[R1], #+1
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STRB R3,[R0], #+1 // *pDest++ = *pSrc++
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SUBS R4,R4,#+1
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BNE _LoopCopyBeforeWrapAround
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//
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// Special case: First check that assumed RdOff == 0 calculated that last element before wrap-around could not be used
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// But 2nd check (considering space until wrap-around and until RdOff) revealed that RdOff is not 0, so we can use the last element
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// In this case, we may use a copy straight until buffer end anyway without needing to copy 2 chunks
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// Therefore, check if 2nd memcpy is necessary at all
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//
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ADDS R4,R2,#+0 // Save <NumBytes> (needed as counter in loop but must be written to <WrOff> after the loop). Also use this inst to update the flags to skip 2nd loop if possible
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BEQ.N _No2ChunkNeeded // if (NumBytes) {
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_LoopCopyAfterWrapAround: // memcpy(pRing->pBuffer, pData + Rem, NumBytes);
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LDRB R3,[R1], #+1 // pData already points to the next src byte due to copy loop increment before this loop
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STRB R3,[R5], #+1 // *pDest++ = *pSrc++
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SUBS R2,R2,#+1
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BNE _LoopCopyAfterWrapAround
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_No2ChunkNeeded:
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#if _CORE_NEEDS_DMB // Do not slow down cores that do not need a DMB instruction here
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DMB // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the <WrOff> in the struct
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#endif
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STR R4,[R6, #+12] // pRing->WrOff = NumBytes; => Must be written after copying data because J-Link may read control block asynchronously while writing into buffer
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MOVS R0,#+1
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POP {R4-R7}
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BX LR // Return 1
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_CheckCase4:
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SUBS R0,R0,R7
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SUBS R0,R0,#+1 // Avail = RdOff - WrOff - 1u;
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CMP R0,R2
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BCS.N _Case4 // if (Avail >= NumBytes) { => Case 4) == 1) ? => If not, we have case 5) == 3) (does not fit)
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_Case3:
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MOVS R0,#+0
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POP {R4-R7}
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BX LR // Return 0
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_PLACE_LITS
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#endif // defined (RTT_USE_ASM) && (RTT_USE_ASM == 1)
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_END
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/*************************** End of file ****************************/
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