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git-subtree-dir: examples/knx-cc1310/coresdk_cc13xx_cc26xx git-subtree-split: 0d78d3280357416a5c0388148cda13717c9ffaa5
254 lines
8.7 KiB
C
254 lines
8.7 KiB
C
/******************************************************************************
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* Filename: ssi.c
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* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017)
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* Revision: 48852
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*
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* Description: Driver for Synchronous Serial Interface
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*
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* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#include "ssi.h"
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//*****************************************************************************
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//
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// Handle support for DriverLib in ROM:
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// This section will undo prototype renaming made in the header file
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//
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//*****************************************************************************
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#if !defined(DOXYGEN)
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#undef SSIConfigSetExpClk
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#define SSIConfigSetExpClk NOROM_SSIConfigSetExpClk
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#undef SSIDataPut
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#define SSIDataPut NOROM_SSIDataPut
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#undef SSIDataPutNonBlocking
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#define SSIDataPutNonBlocking NOROM_SSIDataPutNonBlocking
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#undef SSIDataGet
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#define SSIDataGet NOROM_SSIDataGet
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#undef SSIDataGetNonBlocking
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#define SSIDataGetNonBlocking NOROM_SSIDataGetNonBlocking
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#undef SSIIntRegister
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#define SSIIntRegister NOROM_SSIIntRegister
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#undef SSIIntUnregister
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#define SSIIntUnregister NOROM_SSIIntUnregister
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#endif
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//*****************************************************************************
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//
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// Configures the synchronous serial port
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//
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//*****************************************************************************
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void
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SSIConfigSetExpClk(uint32_t ui32Base, uint32_t ui32SSIClk,
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uint32_t ui32Protocol, uint32_t ui32Mode,
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uint32_t ui32BitRate, uint32_t ui32DataWidth)
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{
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uint32_t ui32MaxBitRate;
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uint32_t ui32RegVal;
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uint32_t ui32PreDiv;
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uint32_t ui32SCR;
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uint32_t ui32SPH_SPO;
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// Check the arguments.
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ASSERT(SSIBaseValid(ui32Base));
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ASSERT((ui32Protocol == SSI_FRF_MOTO_MODE_0) ||
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(ui32Protocol == SSI_FRF_MOTO_MODE_1) ||
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(ui32Protocol == SSI_FRF_MOTO_MODE_2) ||
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(ui32Protocol == SSI_FRF_MOTO_MODE_3) ||
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(ui32Protocol == SSI_FRF_TI) ||
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(ui32Protocol == SSI_FRF_NMW));
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ASSERT((ui32Mode == SSI_MODE_MASTER) ||
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(ui32Mode == SSI_MODE_SLAVE) ||
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(ui32Mode == SSI_MODE_SLAVE_OD));
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ASSERT(((ui32Mode == SSI_MODE_MASTER) && (ui32BitRate <= (ui32SSIClk / 2))) ||
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((ui32Mode != SSI_MODE_MASTER) && (ui32BitRate <= (ui32SSIClk / 12))));
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ASSERT((ui32SSIClk / ui32BitRate) <= (254 * 256));
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ASSERT((ui32DataWidth >= 4) && (ui32DataWidth <= 16));
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// Set the mode.
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ui32RegVal = (ui32Mode == SSI_MODE_SLAVE_OD) ? SSI_CR1_SOD : 0;
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ui32RegVal |= (ui32Mode == SSI_MODE_MASTER) ? 0 : SSI_CR1_MS;
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HWREG(ui32Base + SSI_O_CR1) = ui32RegVal;
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// Set the clock predivider.
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ui32MaxBitRate = ui32SSIClk / ui32BitRate;
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ui32PreDiv = 0;
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do
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{
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ui32PreDiv += 2;
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ui32SCR = (ui32MaxBitRate / ui32PreDiv) - 1;
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}
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while(ui32SCR > 255);
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HWREG(ui32Base + SSI_O_CPSR) = ui32PreDiv;
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// Set protocol and clock rate.
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ui32SPH_SPO = (ui32Protocol & 3) << 6;
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ui32Protocol &= SSI_CR0_FRF_M;
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ui32RegVal = (ui32SCR << 8) | ui32SPH_SPO | ui32Protocol | (ui32DataWidth - 1);
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HWREG(ui32Base + SSI_O_CR0) = ui32RegVal;
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}
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//*****************************************************************************
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//
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// Puts a data element into the SSI transmit FIFO
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//
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//*****************************************************************************
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int32_t
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SSIDataPutNonBlocking(uint32_t ui32Base, uint32_t ui32Data)
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{
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// Check the arguments.
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ASSERT(SSIBaseValid(ui32Base));
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ASSERT((ui32Data & (0xfffffffe << (HWREG(ui32Base + SSI_O_CR0) &
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SSI_CR0_DSS_M))) == 0);
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// Check for space to write.
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if(HWREG(ui32Base + SSI_O_SR) & SSI_SR_TNF)
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{
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HWREG(ui32Base + SSI_O_DR) = ui32Data;
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return(1);
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}
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else
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{
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return(0);
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}
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}
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//*****************************************************************************
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//
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// Puts a data element into the SSI transmit FIFO
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//
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//*****************************************************************************
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void
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SSIDataPut(uint32_t ui32Base, uint32_t ui32Data)
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{
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// Check the arguments.
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ASSERT(SSIBaseValid(ui32Base));
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ASSERT((ui32Data & (0xfffffffe << (HWREG(ui32Base + SSI_O_CR0) &
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SSI_CR0_DSS_M))) == 0);
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// Wait until there is space.
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while(!(HWREG(ui32Base + SSI_O_SR) & SSI_SR_TNF))
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{
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}
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// Write the data to the SSI.
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HWREG(ui32Base + SSI_O_DR) = ui32Data;
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}
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//*****************************************************************************
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//
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// Gets a data element from the SSI receive FIFO
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//
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//*****************************************************************************
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void
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SSIDataGet(uint32_t ui32Base, uint32_t *pui32Data)
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{
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// Check the arguments.
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ASSERT(SSIBaseValid(ui32Base));
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// Wait until there is data to be read.
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while(!(HWREG(ui32Base + SSI_O_SR) & SSI_SR_RNE))
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{
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}
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// Read data from SSI.
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*pui32Data = HWREG(ui32Base + SSI_O_DR);
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}
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//*****************************************************************************
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//
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// Gets a data element from the SSI receive FIFO
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//
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//*****************************************************************************
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int32_t
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SSIDataGetNonBlocking(uint32_t ui32Base, uint32_t *pui32Data)
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{
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// Check the arguments.
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ASSERT(SSIBaseValid(ui32Base));
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// Check for data to read.
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if(HWREG(ui32Base + SSI_O_SR) & SSI_SR_RNE)
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{
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*pui32Data = HWREG(ui32Base + SSI_O_DR);
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return(1);
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}
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else
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{
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return(0);
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}
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}
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//*****************************************************************************
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//
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// Registers an interrupt handler for the synchronous serial port
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//
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//*****************************************************************************
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void
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SSIIntRegister(uint32_t ui32Base, void (*pfnHandler)(void))
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{
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uint32_t ui32Int;
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// Check the arguments.
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ASSERT(SSIBaseValid(ui32Base));
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// Determine the interrupt number based on the SSI port.
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ui32Int = (ui32Base == SSI0_BASE) ? INT_SSI0_COMB : INT_SSI1_COMB;
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// Register the interrupt handler.
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IntRegister(ui32Int, pfnHandler);
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// Enable the synchronous serial port interrupt.
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IntEnable(ui32Int);
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}
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//*****************************************************************************
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//
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// Unregisters an interrupt handler for the synchronous serial port
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//
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//*****************************************************************************
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void
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SSIIntUnregister(uint32_t ui32Base)
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{
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uint32_t ui32Int;
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// Check the arguments.
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ASSERT(SSIBaseValid(ui32Base));
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// Determine the interrupt number based on the SSI port.
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ui32Int = (ui32Base == SSI0_BASE) ? INT_SSI0_COMB : INT_SSI1_COMB;
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// Disable the interrupt.
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IntDisable(ui32Int);
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// Unregister the interrupt handler.
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IntUnregister(ui32Int);
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}
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