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393 lines
14 KiB
C
393 lines
14 KiB
C
/******************************************************************************
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* Filename: timer.c
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* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017)
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* Revision: 48852
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*
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* Description: Driver for the General Purpose Timer
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*
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* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#include "timer.h"
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//*****************************************************************************
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//
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// Handle support for DriverLib in ROM:
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// This section will undo prototype renaming made in the header file
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//
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//*****************************************************************************
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#if !defined(DOXYGEN)
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#undef TimerConfigure
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#define TimerConfigure NOROM_TimerConfigure
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#undef TimerLevelControl
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#define TimerLevelControl NOROM_TimerLevelControl
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#undef TimerStallControl
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#define TimerStallControl NOROM_TimerStallControl
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#undef TimerWaitOnTriggerControl
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#define TimerWaitOnTriggerControl NOROM_TimerWaitOnTriggerControl
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#undef TimerIntRegister
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#define TimerIntRegister NOROM_TimerIntRegister
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#undef TimerIntUnregister
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#define TimerIntUnregister NOROM_TimerIntUnregister
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#undef TimerMatchUpdateMode
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#define TimerMatchUpdateMode NOROM_TimerMatchUpdateMode
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#undef TimerIntervalLoadMode
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#define TimerIntervalLoadMode NOROM_TimerIntervalLoadMode
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#endif
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//*****************************************************************************
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//
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//! \brief Gets the timer interrupt number.
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//!
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//! Given a timer base address, this function returns the corresponding
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//! interrupt number.
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//!
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//! \param ui32Base is the base address of the timer module.
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//!
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//! \return Returns a timer interrupt number, or -1 if \c ui32Base is invalid.
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//
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//*****************************************************************************
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static uint32_t
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TimerIntNumberGet(uint32_t ui32Base)
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{
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uint32_t ui32Int;
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// Loop through the table that maps timer base addresses to interrupt
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// numbers.
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switch(ui32Base)
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{
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case GPT0_BASE :
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ui32Int = INT_GPT0A;
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break;
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case GPT1_BASE :
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ui32Int = INT_GPT1A;
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break;
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case GPT2_BASE :
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ui32Int = INT_GPT2A;
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break;
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case GPT3_BASE :
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ui32Int = INT_GPT3A;
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break;
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default :
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ui32Int = 0x0;
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}
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// Return the interrupt number or (-1) if not base address is not matched.
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return (ui32Int);
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}
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//*****************************************************************************
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//
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// Configures the timer(s)
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//
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//*****************************************************************************
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void
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TimerConfigure(uint32_t ui32Base, uint32_t ui32Config)
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{
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// Check the arguments.
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ASSERT(TimerBaseValid(ui32Base));
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ASSERT((ui32Config == TIMER_CFG_ONE_SHOT) ||
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(ui32Config == TIMER_CFG_ONE_SHOT_UP) ||
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(ui32Config == TIMER_CFG_PERIODIC) ||
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(ui32Config == TIMER_CFG_PERIODIC_UP) ||
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((ui32Config & 0xFF000000) == TIMER_CFG_SPLIT_PAIR));
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ASSERT(((ui32Config & 0xFF000000) != TIMER_CFG_SPLIT_PAIR) ||
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((((ui32Config & 0x000000FF) == TIMER_CFG_A_ONE_SHOT) ||
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((ui32Config & 0x000000FF) == TIMER_CFG_A_ONE_SHOT_UP) ||
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((ui32Config & 0x000000FF) == TIMER_CFG_A_PERIODIC) ||
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((ui32Config & 0x000000FF) == TIMER_CFG_A_PERIODIC_UP) ||
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((ui32Config & 0x000000FF) == TIMER_CFG_A_CAP_COUNT) ||
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((ui32Config & 0x000000FF) == TIMER_CFG_A_CAP_COUNT_UP) ||
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((ui32Config & 0x000000FF) == TIMER_CFG_A_CAP_TIME) ||
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((ui32Config & 0x000000FF) == TIMER_CFG_A_CAP_TIME_UP) ||
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((ui32Config & 0x000000FF) == TIMER_CFG_A_PWM)) &&
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(((ui32Config & 0x0000FF00) == TIMER_CFG_B_ONE_SHOT) ||
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((ui32Config & 0x0000FF00) == TIMER_CFG_B_ONE_SHOT_UP) ||
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((ui32Config & 0x0000FF00) == TIMER_CFG_B_PERIODIC) ||
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((ui32Config & 0x0000FF00) == TIMER_CFG_B_PERIODIC_UP) ||
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((ui32Config & 0x0000FF00) == TIMER_CFG_B_CAP_COUNT) ||
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((ui32Config & 0x0000FF00) == TIMER_CFG_B_CAP_COUNT_UP) ||
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((ui32Config & 0x0000FF00) == TIMER_CFG_B_CAP_TIME) ||
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((ui32Config & 0x0000FF00) == TIMER_CFG_B_CAP_TIME_UP) ||
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((ui32Config & 0x0000FF00) == TIMER_CFG_B_PWM))));
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// Disable the timers.
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HWREG(ui32Base + GPT_O_CTL) &= ~(GPT_CTL_TAEN | GPT_CTL_TBEN);
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// Set the global timer configuration.
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HWREG(ui32Base + GPT_O_CFG) = ui32Config >> 24;
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// Set the configuration of the A and B timers. Note that the B timer
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// configuration is ignored by the hardware in 32-bit modes.
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HWREG(ui32Base + GPT_O_TAMR) = (ui32Config & 0xFF) | GPT_TAMR_TAPWMIE;
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HWREG(ui32Base + GPT_O_TBMR) =
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((ui32Config >> 8) & 0xFF) | GPT_TBMR_TBPWMIE;
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}
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//*****************************************************************************
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//
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// Controls the output level
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//
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//*****************************************************************************
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void
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TimerLevelControl(uint32_t ui32Base, uint32_t ui32Timer, bool bInvert)
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{
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// Check the arguments.
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ASSERT(TimerBaseValid(ui32Base));
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ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
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(ui32Timer == TIMER_BOTH));
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// Set the output levels as requested.
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ui32Timer &= GPT_CTL_TAPWML | GPT_CTL_TBPWML;
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HWREG(ui32Base + GPT_O_CTL) = (bInvert ?
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(HWREG(ui32Base + GPT_O_CTL) | ui32Timer) :
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(HWREG(ui32Base + GPT_O_CTL) &
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~(ui32Timer)));
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}
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//*****************************************************************************
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//
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// Controls the stall handling
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//
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//*****************************************************************************
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void
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TimerStallControl(uint32_t ui32Base, uint32_t ui32Timer, bool bStall)
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{
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// Check the arguments.
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ASSERT(TimerBaseValid(ui32Base));
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ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
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(ui32Timer == TIMER_BOTH));
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// Set the stall mode.
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ui32Timer &= GPT_CTL_TASTALL | GPT_CTL_TBSTALL;
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HWREG(ui32Base + GPT_O_CTL) = (bStall ?
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(HWREG(ui32Base + GPT_O_CTL) | ui32Timer) :
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(HWREG(ui32Base + GPT_O_CTL) & ~(ui32Timer)));
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}
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//*****************************************************************************
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//
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// Controls the wait on trigger handling
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//
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//*****************************************************************************
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void
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TimerWaitOnTriggerControl(uint32_t ui32Base, uint32_t ui32Timer, bool bWait)
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{
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// Check the arguments.
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ASSERT(TimerBaseValid(ui32Base));
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ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
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(ui32Timer == TIMER_BOTH));
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// Set the wait on trigger mode for timer A.
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if(ui32Timer & TIMER_A)
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{
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if(bWait)
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{
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HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAWOT;
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}
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else
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{
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HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAWOT);
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}
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}
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// Set the wait on trigger mode for timer B.
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if(ui32Timer & TIMER_B)
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{
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if(bWait)
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{
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HWREG(ui32Base + GPT_O_TBMR) |= GPT_TBMR_TBWOT;
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}
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else
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{
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HWREG(ui32Base + GPT_O_TBMR) &= ~(GPT_TBMR_TBWOT);
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}
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}
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}
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//*****************************************************************************
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//
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// Registers an interrupt handler for the timer interrupt
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//
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//*****************************************************************************
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void
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TimerIntRegister(uint32_t ui32Base, uint32_t ui32Timer, void (*pfnHandler)(void))
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{
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uint32_t ui32Int;
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// Check the arguments.
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ASSERT(TimerBaseValid(ui32Base));
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ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
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(ui32Timer == TIMER_BOTH));
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// Get the interrupt number for this timer module.
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ui32Int = TimerIntNumberGet(ui32Base);
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// Register an interrupt handler for timer A if requested.
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if(ui32Timer & TIMER_A)
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{
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// Register the interrupt handler.
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IntRegister(ui32Int, pfnHandler);
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// Enable the interrupt.
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IntEnable(ui32Int);
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}
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// Register an interrupt handler for timer B if requested.
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if(ui32Timer & TIMER_B)
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{
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// Register the interrupt handler.
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IntRegister(ui32Int + 1, pfnHandler);
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// Enable the interrupt.
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IntEnable(ui32Int + 1);
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}
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}
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//*****************************************************************************
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//
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// Unregisters an interrupt handler for the timer interrupt
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//
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//*****************************************************************************
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void
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TimerIntUnregister(uint32_t ui32Base, uint32_t ui32Timer)
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{
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uint32_t ui32Int;
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// Check the arguments.
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ASSERT(TimerBaseValid(ui32Base));
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ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
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(ui32Timer == TIMER_BOTH));
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// Get the interrupt number for this timer module.
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ui32Int = TimerIntNumberGet(ui32Base);
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// Unregister the interrupt handler for timer A if requested.
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if(ui32Timer & TIMER_A)
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{
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// Disable the interrupt.
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IntDisable(ui32Int);
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// Unregister the interrupt handler.
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IntUnregister(ui32Int);
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}
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// Unregister the interrupt handler for timer B if requested.
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if(ui32Timer & TIMER_B)
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{
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// Disable the interrupt.
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IntDisable(ui32Int + 1);
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// Unregister the interrupt handler.
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IntUnregister(ui32Int + 1);
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}
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}
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//*****************************************************************************
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//
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// Sets the Match Register Update mode
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//
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//*****************************************************************************
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void
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TimerMatchUpdateMode(uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Mode)
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{
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// Check the arguments
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ASSERT(TimerBaseValid(ui32Base));
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ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) || (ui32Timer == TIMER_BOTH));
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ASSERT((ui32Mode == TIMER_MATCHUPDATE_NEXTCYCLE) || (ui32Mode == TIMER_MATCHUPDATE_TIMEOUT));
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// Set mode for timer A
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if(ui32Timer & TIMER_A)
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{
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if(ui32Mode == TIMER_MATCHUPDATE_NEXTCYCLE)
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{
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HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAMRSU);
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}
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else
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{
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HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAMRSU;
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}
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}
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// Set mode for timer B
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if(ui32Timer & TIMER_B)
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{
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if(ui32Mode == TIMER_MATCHUPDATE_NEXTCYCLE)
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{
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HWREG(ui32Base + GPT_O_TBMR) &= ~(GPT_TBMR_TBMRSU);
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}
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else
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{
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HWREG(ui32Base + GPT_O_TBMR) |= GPT_TBMR_TBMRSU;
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}
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}
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}
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//*****************************************************************************
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//
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// Sets the Interval Load mode
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//
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//*****************************************************************************
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void
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TimerIntervalLoadMode(uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Mode)
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{
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// Check the arguments
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ASSERT(TimerBaseValid(ui32Base));
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ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) || (ui32Timer == TIMER_BOTH));
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ASSERT((ui32Mode == TIMER_INTERVALLOAD_NEXTCYCLE) || (ui32Mode == TIMER_INTERVALLOAD_TIMEOUT));
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// Set mode for timer A
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if(ui32Timer & TIMER_A)
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{
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if(ui32Mode == TIMER_INTERVALLOAD_NEXTCYCLE)
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{
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HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAILD);
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}
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else
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{
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HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAILD;
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}
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}
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// Set mode for timer B
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if(ui32Timer & TIMER_B)
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{
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if(ui32Mode == TIMER_INTERVALLOAD_NEXTCYCLE)
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{
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HWREG(ui32Base + GPT_O_TBMR) &= ~(GPT_TBMR_TBILD);
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}
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else
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{
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HWREG(ui32Base + GPT_O_TBMR) |= GPT_TBMR_TBILD;
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}
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}
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}
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