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521 lines
19 KiB
C
521 lines
19 KiB
C
/******************************************************************************
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* Filename: wdt.h
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* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017)
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* Revision: 49048
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*
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* Description: Defines and prototypes for the Watchdog Timer.
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*
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* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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//*****************************************************************************
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//
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//! \addtogroup peripheral_group
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//! @{
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//! \addtogroup wdt_api
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//! @{
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//
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//*****************************************************************************
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#ifndef __WDT_H__
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#define __WDT_H__
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//*****************************************************************************
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//
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// If building with a C++ compiler, make all of the definitions in this header
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// have a C binding.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include <stdbool.h>
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#include <stdint.h>
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#include "../inc/hw_types.h"
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#include "../inc/hw_ints.h"
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#include "../inc/hw_memmap.h"
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#include "../inc/hw_wdt.h"
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#include "debug.h"
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#include "interrupt.h"
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the WDT_O_LOCK register.
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//
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//*****************************************************************************
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#define WATCHDOG_LOCK_UNLOCKED 0x00000000 // Unlocked
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#define WATCHDOG_LOCK_LOCKED 0x00000001 // Locked
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#define WATCHDOG_LOCK_UNLOCK 0x1ACCE551 // Unlocks the Watchdog Timer
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the WDT_ISR, WDT_RIS, and
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// WDT_MIS registers.
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//
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//*****************************************************************************
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#define WATCHDOG_INT_TIMEOUT 0x00000001 // Watchdog timer expired
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//*****************************************************************************
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//
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// The type of interrupt that can be generated by the watchdog.
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//
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//*****************************************************************************
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#define WATCHDOG_INT_TYPE_INT 0x00000000
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#define WATCHDOG_INT_TYPE_NMI 0x00000004
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//*****************************************************************************
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//
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// API Functions and prototypes
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! \brief Determines if the watchdog timer is enabled.
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//!
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//! This function checks to see if the watchdog timer is enabled.
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//!
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//! \return Returns status of Watchdog Timer:
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//! - \c true : Watchdog timer is enabled.
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//! - \c false : Watchdog timer is disabled.
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//
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//*****************************************************************************
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__STATIC_INLINE bool
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WatchdogRunning(void)
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{
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// See if the watchdog timer module is enabled, and return.
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return((HWREG(WDT_BASE + WDT_O_CTL) & WDT_CTL_INTEN) ? true : false);
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}
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//*****************************************************************************
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//
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//! \brief Enables the watchdog timer.
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//!
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//! This function enables the watchdog timer counter and interrupt.
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//!
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//! Once enabled, the watchdog interrupt can only be disabled by a hardware reset.
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//!
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//! \note This function has no effect if the watchdog timer has been locked.
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//!
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//! \return None
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//!
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//! \sa \ref WatchdogLock(), \ref WatchdogUnlock()
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogEnable(void)
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{
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// Enable the watchdog timer module.
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HWREGBITW(WDT_BASE + WDT_O_CTL, WDT_CTL_INTEN_BITN) = 1;
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}
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//*****************************************************************************
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//
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//! \brief Enables the watchdog timer reset.
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//!
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//! This function enables the capability of the watchdog timer to issue a reset
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//! to the processor after a second timeout condition.
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//!
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//! \note This function has no effect if the watchdog timer has been locked.
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//!
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//! \return None
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//!
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//! \sa \ref WatchdogLock(), \ref WatchdogUnlock()
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogResetEnable(void)
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{
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// Enable the watchdog reset.
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HWREGBITW(WDT_BASE + WDT_O_CTL, WDT_CTL_RESEN_BITN) = 1;
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}
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//*****************************************************************************
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//
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//! \brief Disables the watchdog timer reset.
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//!
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//! This function disables the capability of the watchdog timer to issue a
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//! reset to the processor after a second timeout condition.
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//!
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//! \note This function has no effect if the watchdog timer has been locked.
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//!
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//! \return None
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//!
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//! \sa \ref WatchdogLock(), \ref WatchdogUnlock()
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogResetDisable(void)
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{
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// Disable the watchdog reset.
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HWREGBITW(WDT_BASE + WDT_O_CTL, WDT_CTL_RESEN_BITN) = 0;
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}
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//*****************************************************************************
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//
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//! \brief Enables the watchdog timer lock mechanism.
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//!
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//! This function locks out write access to the watchdog timer configuration
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//! registers.
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//!
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//! \return None
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogLock(void)
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{
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// Lock out watchdog register writes. Writing anything to the WDT_O_LOCK
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// register causes the lock to go into effect.
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HWREG(WDT_BASE + WDT_O_LOCK) = WATCHDOG_LOCK_LOCKED;
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}
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//*****************************************************************************
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//
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//! \brief Disables the watchdog timer lock mechanism.
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//!
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//! This function enables write access to the watchdog timer configuration
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//! registers.
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//!
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//! \return None
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogUnlock(void)
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{
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// Unlock watchdog register writes.
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HWREG(WDT_BASE + WDT_O_LOCK) = WATCHDOG_LOCK_UNLOCK;
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}
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//*****************************************************************************
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//
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//! \brief Gets the state of the watchdog timer lock mechanism.
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//!
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//! This function returns the lock state of the watchdog timer registers.
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//!
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//! \return Returns state of lock mechanism.
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//! - \c true : Watchdog timer registers are locked.
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//! - \c false : Registers are not locked.
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//
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//*****************************************************************************
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__STATIC_INLINE bool
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WatchdogLockState(void)
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{
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// Get the lock state.
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return((HWREG(WDT_BASE + WDT_O_LOCK) == WATCHDOG_LOCK_LOCKED) ?
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true : false);
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}
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//*****************************************************************************
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//
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//! \brief Sets the watchdog timer reload value.
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//!
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//! This function configures the value to load into the watchdog timer when the
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//! count reaches zero for the first time; if the watchdog timer is running
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//! when this function is called, then the value is immediately loaded into the
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//! watchdog timer counter. If the \c ui32LoadVal parameter is 0, then an
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//! interrupt is immediately generated.
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//!
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//! \note This function has no effect if the watchdog timer has been locked.
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//!
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//! \param ui32LoadVal is the load value for the watchdog timer.
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//!
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//! \return None
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//!
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//! \sa \ref WatchdogLock(), \ref WatchdogUnlock(), \ref WatchdogReloadGet()
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogReloadSet(uint32_t ui32LoadVal)
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{
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// Set the load register.
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HWREG(WDT_BASE + WDT_O_LOAD) = ui32LoadVal;
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}
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//*****************************************************************************
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//
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//! \brief Gets the watchdog timer reload value.
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//!
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//! This function gets the value that is loaded into the watchdog timer when
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//! the count reaches zero for the first time.
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//!
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//! \return None
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//!
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//! \sa \ref WatchdogReloadSet()
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//
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//*****************************************************************************
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__STATIC_INLINE uint32_t
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WatchdogReloadGet(void)
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{
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// Get the load register.
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return(HWREG(WDT_BASE + WDT_O_LOAD));
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}
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//*****************************************************************************
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//
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//! \brief Gets the current watchdog timer value.
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//!
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//! This function reads the current value of the watchdog timer.
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//!
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//! \return Returns the current value of the watchdog timer.
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//
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//*****************************************************************************
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__STATIC_INLINE uint32_t
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WatchdogValueGet(void)
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{
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// Get the current watchdog timer register value.
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return(HWREG(WDT_BASE + WDT_O_VALUE));
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}
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//*****************************************************************************
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//
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//! \brief Registers an interrupt handler for the watchdog timer interrupt in the dynamic interrupt table.
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//!
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//! \note Only use this function if you want to use the dynamic vector table (in SRAM)!
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//!
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//! This function registers a function as the interrupt handler for a specific
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//! interrupt and enables the corresponding interrupt in the interrupt controller.
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//!
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//! The watchdog timer interrupt must be enabled via \ref WatchdogIntEnable(). It is the
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//! interrupt handler's responsibility to clear the interrupt source via
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//! \ref WatchdogIntClear().
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//!
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//! \note This function registers the standard watchdog interrupt handler. To
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//! register the NMI watchdog handler, use \ref IntRegister() to register the
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//! handler for the \b INT_NMI_FAULT interrupt.
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//!
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//! \param pfnHandler is a pointer to the function to be called when the
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//! watchdog timer interrupt occurs.
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//!
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//! \return None
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//!
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//! \sa \ref IntRegister() for important information about registering interrupt
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//! handlers.
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogIntRegister(void (*pfnHandler)(void))
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{
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// Register the interrupt handler.
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IntRegister(INT_WDT_IRQ, pfnHandler);
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// Enable the watchdog timer interrupt.
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IntEnable(INT_WDT_IRQ);
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}
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//*****************************************************************************
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//
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//! \brief Unregisters an interrupt handler for the watchdog timer interrupt in the dynamic interrupt table.
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//!
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//! This function does the actual unregistering of the interrupt handler. This
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//! function clears the handler to be called when a watchdog timer interrupt
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//! occurs. This function also masks off the interrupt in the interrupt
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//! controller so that the interrupt handler no longer is called.
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//!
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//! \note This function registers the standard watchdog interrupt handler. To
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//! register the NMI watchdog handler, use \ref IntRegister() to register the
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//! handler for the \b INT_NMI_FAULT interrupt.
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//!
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//! \return None
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//!
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//! \sa \ref IntRegister() for important information about registering interrupt
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//! handlers.
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogIntUnregister(void)
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{
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// Disable the interrupt.
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IntDisable(INT_WDT_IRQ);
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// Unregister the interrupt handler.
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IntUnregister(INT_WDT_IRQ);
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}
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//*****************************************************************************
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//
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//! \brief Enables the watchdog timer.
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//!
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//! This function enables the watchdog timer interrupt by calling \ref WatchdogEnable().
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//!
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//! \return None
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//!
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//! \sa \ref WatchdogEnable()
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogIntEnable(void)
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{
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// Enable the Watchdog interrupt.
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WatchdogEnable();
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}
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//*****************************************************************************
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//
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//! \brief Gets the current watchdog timer interrupt status.
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//!
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//! This function returns the interrupt status for the watchdog timer module.
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//!
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//! \return Returns the interrupt status.
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//! - 1 : Watchdog time-out has occurred.
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//! - 0 : Watchdog time-out has not occurred.
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//!
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//! \sa \ref WatchdogIntClear();
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//
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//*****************************************************************************
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__STATIC_INLINE uint32_t
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WatchdogIntStatus(void)
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{
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// Return either the interrupt status or the raw interrupt status as
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// requested.
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return(HWREG(WDT_BASE + WDT_O_RIS));
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}
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//*****************************************************************************
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//
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//! \brief Clears the watchdog timer interrupt.
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//!
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//! The watchdog timer interrupt source is cleared, so that it no longer
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//! asserts.
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//!
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//! \note Due to write buffers and synchronizers in the system it may take several
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//! clock cycles from a register write clearing an event in a module and until the
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//! event is actually cleared in the NVIC of the system CPU. It is recommended to
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//! clear the event source early in the interrupt service routine (ISR) to allow
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//! the event clear to propagate to the NVIC before returning from the ISR.
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//! At the same time, an early event clear allows new events of the same type to be
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//! pended instead of ignored if the event is cleared later in the ISR.
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//! It is the responsibility of the programmer to make sure that enough time has passed
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//! before returning from the ISR to avoid false re-triggering of the cleared event.
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//! A simple, although not necessarily optimal, way of clearing an event before
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//! returning from the ISR is:
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//! -# Write to clear event (interrupt source). (buffered write)
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//! -# Dummy read from the event source module. (making sure the write has propagated)
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//! -# Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)
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//!
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//! \return None
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogIntClear(void)
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{
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// Clear the interrupt source.
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HWREG(WDT_BASE + WDT_O_ICR) = WATCHDOG_INT_TIMEOUT;
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}
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//*****************************************************************************
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//
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//! \brief Sets the type of interrupt generated by the watchdog.
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//!
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//! This function sets the type of interrupt that is generated if the watchdog
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//! timer expires.
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//!
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//! When configured to generate an NMI, the watchdog interrupt must still be
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//! enabled with \ref WatchdogIntEnable(), and it must still be cleared inside the
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//! NMI handler with \ref WatchdogIntClear().
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//!
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//! \param ui32Type is the type of interrupt to generate.
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//! - \ref WATCHDOG_INT_TYPE_INT : Generate a standard interrupt (default).
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//! - \ref WATCHDOG_INT_TYPE_NMI : Generate a non-maskable interrupt (NMI).
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//!
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//! \return None
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogIntTypeSet(uint32_t ui32Type)
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{
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// Check the arguments.
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ASSERT((ui32Type == WATCHDOG_INT_TYPE_INT) ||
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(ui32Type == WATCHDOG_INT_TYPE_NMI));
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// Set the interrupt type.
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HWREGBITW(WDT_BASE + WDT_O_CTL, WDT_CTL_INTTYPE_BITN) = (ui32Type == WATCHDOG_INT_TYPE_INT)? 0 : 1;
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}
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//*****************************************************************************
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//
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//! \brief Enables stalling of the watchdog timer during debug events.
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//!
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//! This function allows the watchdog timer to stop counting when the processor
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//! is stopped by the debugger. By doing so, the watchdog is prevented from
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//! expiring and resetting the system (if reset is enabled). The watchdog instead expires
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//! after the appropriate number of processor cycles have been executed while
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//! debugging (or at the appropriate time after the processor has been
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//! restarted).
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//!
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//! \return None
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogStallEnable(void)
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{
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// Enable timer stalling.
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HWREGBITW(WDT_BASE + WDT_O_TEST, WDT_TEST_STALL_BITN) = 1;
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}
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//*****************************************************************************
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//
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//! \brief Disables stalling of the watchdog timer during debug events.
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//!
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//! This function disables the debug mode stall of the watchdog timer. By
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//! doing so, the watchdog timer continues to count regardless of the processor
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//! debug state.
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//!
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//! \return None
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//
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//*****************************************************************************
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__STATIC_INLINE void
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WatchdogStallDisable(void)
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{
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// Disable timer stalling.
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HWREGBITW(WDT_BASE + WDT_O_TEST, WDT_TEST_STALL_BITN) = 0;
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}
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//*****************************************************************************
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//
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// Mark the end of the C bindings section for C++ compilers.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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}
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#endif
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#endif // __WDT_H__
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//*****************************************************************************
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//
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//! Close the Doxygen group.
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//! @}
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//! @}
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//
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//*****************************************************************************
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