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git-subtree-dir: examples/knx-cc1310/coresdk_cc13xx_cc26xx git-subtree-split: 0d78d3280357416a5c0388148cda13717c9ffaa5
188 lines
10 KiB
C
188 lines
10 KiB
C
/*
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* Copyright (c) 2019, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/** ============================================================================
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* @file I2SCC26XX.h
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*
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* @brief I2S driver implementation for a CC26XX I2S controller
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*
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* ============================================================================
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*/
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#ifndef ti_drivers_i2s_I2SCC26XX__include
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#define ti_drivers_i2s_I2SCC26XX__include
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#include <ti/drivers/I2S.h>
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#include <ti/drivers/dpl/SemaphoreP.h>
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#include <ti/drivers/dpl/HwiP.h>
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#include <ti/drivers/PIN.h>
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#include <ti/drivers/pin/PINCC26XX.h>
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#include <ti/drivers/Power.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*!
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* @brief I2S Hardware attributes
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*
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* intPriority is the I2S peripheral's interrupt priority, as defined by the
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* TI-RTOS kernel. This value is passed unmodified to Hwi_create().
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*
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* pinSD1 and pinSD0 define the SD0 and SD1 data pin mapping, respectively.
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* pinSCK, pinMCLK and pinWS define the SCK, MCLK and WS clock pin mapping, respectively.
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* All these pins are typically defined with a macro in a header file, which maps to an IOID.
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*
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* A sample structure is shown below:
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* @code
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* const I2SCC26XX_HWAttrs i2sHWAttrs[CC26X2R1_LAUNCHXL_I2SCOUNT] = {
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* {
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* .pinSD1 = Board_I2S_ADI,
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* .pinSD0 = Board_I2S_ADO,
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* .pinSCK = Board_I2S_BCLK,
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* .pinMCLK = Board_I2S_MCLK,
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* .pinWS = Board_I2S_WCLK,
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* .intPriority = ~0,
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* },
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* };
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* @endcode
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*/
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typedef struct I2SCC26XX_HWAttrs_ {
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PIN_Id pinSD1; /*!< Pin used for SD1 signal. */
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PIN_Id pinSD0; /*!< Pin used for SD0 signal. */
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PIN_Id pinSCK; /*!< Pin used for SCK signal. */
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PIN_Id pinMCLK; /*!< Pin used for MCLK signal. Non used in most of the applications. */
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PIN_Id pinWS; /*!< Pin used for WS signal. */
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uint8_t intPriority; /*!< I2S Peripheral's interrupt priority. */
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}I2SCC26XX_HWAttrs;
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/*!
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* @cond NODOC
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* I2S data-interface
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*
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* This enum defines how the physical I2S interface (SD0/SD1) behaves.
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* Do not modify.
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*/
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typedef struct I2SCC26XX_DataInterface_ {
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uint8_t numberOfChannelsUsed; /*!< Number of channels used on SDx. */
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I2S_ChannelConfig channelsUsed; /*!< List of the used channels. */
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I2S_DataInterfaceUse interfaceConfig; /*!< IN / OUT / UNUSED */
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}I2SCC26XX_DataInterface;
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/*! @endcond */
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/*!
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* @cond NODOC
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* I2S interface
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*
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* This enum defines one of the interfaces (READ or WRITE) of the I2S module.
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* Do not modify.
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*/
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typedef struct I2SCC26XX_Interface_ {
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uint16_t memoryStep; /*!< Size of the memory step to access the following sample */
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uint16_t delay; /*!< Number of WS cycles to wait before starting the first transfer. This value is mostly used when performing constant latency transfers. */
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I2S_Callback callback; /*!< Pointer to callback */
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I2S_RegUpdate pointerSet; /*!< Pointer on the function used to update PTR-NEXT */
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I2S_Transaction *activeTransfer; /*!< Pointer on the ongoing transfer */
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}I2SCC26XX_Interface;
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/*! @endcond */
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/*!
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* @brief The definition of a function used by the I2S driver
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* to refresh the pointer
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*
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* @param I2S_Handle I2S_Handle
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*
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* @param I2SCC26XX_Interface *interface Pointer on the interface to update
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*
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*/
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typedef void (*I2SCC26XX_PtrUpdate)(I2S_Handle handle, I2SCC26XX_Interface *interface);
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/*!
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* @cond NODOC
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* I2S Object. The application must not access any member variables
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* of this structure!
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*/
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typedef struct I2SCC26XX_Object_ {
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bool isOpen; /*!< To avoid multiple openings of the I2S. */
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bool invertWS; /*!< WS inversion.
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false: The WS signal is not internally inverted.
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true: The WS signal is internally inverted. */
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uint8_t memorySlotLength; /*!< Select the size of the memory used. The two options are 16 bits and 24 bits. Any value can be selected, whatever the value of ::i2sBitsPerWord.
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I2S_MEMORY_LENGTH_16BITS_CC26XX: Memory length is 16 bits.
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I2S_MEMORY_LENGTH_24BITS_CC26XX: Memory length is 24 bits.*/
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uint8_t bitsPerWord; /*!< Number of bits per word (must be between 8 and 24 bits). */
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uint8_t beforeWordPadding; /*!< Number of SCK periods between the first WS edge and the MSB of the first audio channel data transferred during the phase.*/
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uint8_t afterWordPadding; /*!< Number of SCK periods between the LSB of the last audio channel data transferred during the phase and the following WS edge.*/
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uint8_t dmaBuffSizeConfig; /*!< Number of consecutive bytes of the samples buffers. This field must be set to a value x between 1 and 255. All the data buffers used must contain N*x bytes (with N an intger verifying N>0). */
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I2S_SamplingEdge samplingEdge; /*!< Select edge sampling type.
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I2S_SAMPLING_EDGE_FALLING: Sampling on falling edges.
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I2S_SAMPLING_EDGE_RISING: Sampling on raising edges. */
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I2S_Role moduleRole; /*!< Select if the current device is a Slave or a Master.
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I2S_SLAVE: The device is a slave (clocks are generated externally).
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I2S_MASTER: The device is a master (clocks are generated internally). */
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I2S_PhaseType phaseType; /*!< Select phase type.
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I2S_PHASE_TYPE_SINGLE: Single phase.
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I2S_PHASE_TYPE_DUAL: Dual phase.*/
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uint16_t MCLKDivider; /*!< Frequency divider for the MCLK signal. */
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uint16_t SCKDivider; /*!< Frequency divider for the SCK signal. */
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uint16_t WSDivider; /*!< Frequency divider for the WS signal. */
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uint16_t startUpDelay; /*!< Time (in number of WS cycles) to wait before the first transfer. */
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I2SCC26XX_DataInterface dataInterfaceSD0; /*!< Structure to describe the SD0 interface */
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I2SCC26XX_DataInterface dataInterfaceSD1; /*!< Structure to describe the SD1 interface */
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/* PIN driver state object and handle */
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PIN_State pinState; /*!< Pin state for the used pins */
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PIN_Handle hPin; /*!< Handle on the used pins */
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/* I2S SYS/BIOS objects */
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HwiP_Struct hwi; /*!< Hwi object for interrupts */
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I2SCC26XX_PtrUpdate ptrUpdateFxn; /*!< Pointer on the function used to update IN and OUT PTR-NEXT */
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I2SCC26XX_Interface read; /*!< Structure to describe the read (in) interface */
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I2SCC26XX_Interface write; /*!< Structure to describe the write (out) interface */
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I2S_Callback errorCallback; /*!< Pointer to error callback */
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/* I2S pre and post notification functions */
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void *i2sPreFxn; /*!< I2S pre-notification function pointer */
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void *i2sPostFxn; /*!< I2S post-notification function pointer */
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Power_NotifyObj i2sPreObj; /*!< I2S pre-notification object */
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Power_NotifyObj i2sPostObj; /*!< I2S post-notification object */
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volatile bool i2sPowerConstraint; /*!< I2S power constraint flag, guard to avoid power constraints getting out of sync */
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} I2SCC26XX_Object;
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/*! @endcond */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ti_drivers_i2s_I2SCC26XX__include */
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