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git-subtree-dir: examples/knx-cc1310/coresdk_cc13xx_cc26xx git-subtree-split: 0d78d3280357416a5c0388148cda13717c9ffaa5
371 lines
9.6 KiB
C
371 lines
9.6 KiB
C
/*
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* Copyright (c) 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* ======== NVSRAM.c ========
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <string.h>
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#include <ti/drivers/dpl/HwiP.h>
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#include <ti/drivers/dpl/SemaphoreP.h>
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#include <ti/drivers/NVS.h>
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#include <ti/drivers/nvs/NVSRAM.h>
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static int_fast16_t checkEraseRange(NVS_Handle handle, size_t offset, size_t size);
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static int_fast16_t doErase(NVS_Handle handle, size_t offset, size_t size);
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extern NVS_Config NVS_config[];
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extern const uint8_t NVS_count;
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/* NVS function table for NVSRAM implementation */
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const NVS_FxnTable NVSRAM_fxnTable = {
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NVSRAM_close,
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NVSRAM_control,
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NVSRAM_erase,
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NVSRAM_getAttrs,
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NVSRAM_init,
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NVSRAM_lock,
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NVSRAM_open,
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NVSRAM_read,
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NVSRAM_unlock,
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NVSRAM_write
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};
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/*
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* Semaphore to synchronize access to the region.
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*/
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static SemaphoreP_Handle writeSem;
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/*
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* ======== NVSRAM_close ========
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*/
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void NVSRAM_close(NVS_Handle handle)
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{
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((NVSRAM_Object *) handle->object)->isOpen = false;
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}
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/*
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* ======== NVSRAM_control ========
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*/
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int_fast16_t NVSRAM_control(NVS_Handle handle, uint_fast16_t cmd,
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uintptr_t arg)
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{
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return (NVS_STATUS_UNDEFINEDCMD);
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}
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/*
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* ======== NVSRAM_erase ========
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*/
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int_fast16_t NVSRAM_erase(NVS_Handle handle, size_t offset, size_t size)
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{
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int_fast16_t status;
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SemaphoreP_pend(writeSem, SemaphoreP_WAIT_FOREVER);
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status = doErase(handle, offset, size);
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SemaphoreP_post(writeSem);
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return (status);
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}
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/*
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* ======== NVSRAM_getAttrs ========
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*/
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void NVSRAM_getAttrs(NVS_Handle handle, NVS_Attrs *attrs)
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{
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NVSRAM_HWAttrs const *hwAttrs = handle->hwAttrs;
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attrs->regionBase = hwAttrs->regionBase;
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attrs->regionSize = hwAttrs->regionSize;
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attrs->sectorSize = hwAttrs->sectorSize;
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}
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/*
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* ======== NVSRAM_init ========
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*/
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void NVSRAM_init()
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{
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uintptr_t key;
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SemaphoreP_Handle sem;
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/* speculatively create a binary semaphore for thread safety */
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sem = SemaphoreP_createBinary(1);
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/* sem == NULL will be detected in 'open' */
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key = HwiP_disable();
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if (writeSem == NULL) {
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/* use the binary sem created above */
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writeSem = sem;
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HwiP_restore(key);
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}
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else {
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/* init already called */
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HwiP_restore(key);
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/* delete unused Semaphore */
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if (sem) {
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SemaphoreP_delete(sem);
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}
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}
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}
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/*
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* ======== NVSRAM_lock =======
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*/
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int_fast16_t NVSRAM_lock(NVS_Handle handle, uint32_t timeout)
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{
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if (SemaphoreP_pend(writeSem, timeout) != SemaphoreP_OK) {
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return (NVS_STATUS_TIMEOUT);
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}
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return (NVS_STATUS_SUCCESS);
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}
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/*
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* ======== NVSRAM_open =======
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*/
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NVS_Handle NVSRAM_open(uint_least8_t index, NVS_Params *params)
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{
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NVS_Handle handle;
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NVSRAM_Object *object;
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NVSRAM_HWAttrs const *hwAttrs;
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/* Confirm that 'init' has successfully completed */
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if (writeSem == NULL) {
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NVSRAM_init();
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if (writeSem == NULL) {
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return (NULL);
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}
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}
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/* verify NVS region index */
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if (index >= NVS_count) {
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return (NULL);
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}
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handle = &NVS_config[index];
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object = NVS_config[index].object;
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hwAttrs = NVS_config[index].hwAttrs;
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/* for efficient argument checking */
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object->sectorBaseMask = ~(hwAttrs->sectorSize - 1);
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SemaphoreP_pend(writeSem, SemaphoreP_WAIT_FOREVER);
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if (object->isOpen) {
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SemaphoreP_post(writeSem);
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return (NULL);
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}
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/* The regionBase must be aligned on a page boundary */
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if ((size_t) (hwAttrs->regionBase) & (hwAttrs->sectorSize - 1)) {
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SemaphoreP_post(writeSem);
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return (NULL);
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}
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/* The region cannot be smaller than a sector size */
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if (hwAttrs->regionSize < hwAttrs->sectorSize) {
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SemaphoreP_post(writeSem);
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return (NULL);
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}
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/* The region size must be a multiple of sector size */
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if (hwAttrs->regionSize !=
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(hwAttrs->regionSize & object->sectorBaseMask)) {
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SemaphoreP_post(writeSem);
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return (NULL);
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}
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object->isOpen = true;
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SemaphoreP_post(writeSem);
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return (handle);
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}
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/*
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* ======== NVSRAM_read =======
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*/
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int_fast16_t NVSRAM_read(NVS_Handle handle, size_t offset, void *buffer,
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size_t bufferSize)
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{
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NVSRAM_HWAttrs const *hwAttrs = handle->hwAttrs;
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/* Validate offset and bufferSize */
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if (offset + bufferSize > hwAttrs->regionSize) {
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return (NVS_STATUS_INV_OFFSET);
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}
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/*
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* Get exclusive access to the region. We don't want someone
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* else to erase the region while we are reading it.
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*/
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SemaphoreP_pend(writeSem, SemaphoreP_WAIT_FOREVER);
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memcpy(buffer, (char *)(hwAttrs->regionBase) + offset, bufferSize);
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SemaphoreP_post(writeSem);
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return (NVS_STATUS_SUCCESS);
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}
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/*
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* ======== NVSRAM_unlock =======
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*/
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void NVSRAM_unlock(NVS_Handle handle)
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{
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SemaphoreP_post(writeSem);
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}
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/*
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* ======== NVSRAM_write =======
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*/
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int_fast16_t NVSRAM_write(NVS_Handle handle, size_t offset, void *buffer,
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size_t bufferSize, uint_fast16_t flags)
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{
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size_t i;
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uint8_t *dstBuf;
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uint8_t *srcBuf;
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int_fast16_t result;
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size_t size;
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NVSRAM_Object *object = handle->object;
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NVSRAM_HWAttrs const *hwAttrs = handle->hwAttrs;
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/* Validate offset and bufferSize */
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if (offset + bufferSize > hwAttrs->regionSize) {
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return (NVS_STATUS_INV_OFFSET);
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}
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/* Get exclusive access to the Flash region */
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SemaphoreP_pend(writeSem, SemaphoreP_WAIT_FOREVER);
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/* If erase is set, erase destination sector(s) first */
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if (flags & NVS_WRITE_ERASE) {
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size = bufferSize & object->sectorBaseMask;
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if (bufferSize & (~object->sectorBaseMask)) {
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size += hwAttrs->sectorSize;
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}
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result = doErase(handle, offset & object->sectorBaseMask, size);
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if (result != NVS_STATUS_SUCCESS) {
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SemaphoreP_post(writeSem);
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return (result);
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}
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}
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else if (flags & NVS_WRITE_PRE_VERIFY) {
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/*
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* If pre-verify, each destination byte must be able to be changed to the
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* source byte (1s to 0s, not 0s to 1s).
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* this is satisfied by the following test:
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* src == (src & dst)
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*/
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dstBuf = (uint8_t *)((uint32_t)(hwAttrs->regionBase) + offset);
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srcBuf = buffer;
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for (i = 0; i < bufferSize; i++) {
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if (srcBuf[i] != (srcBuf[i] & dstBuf[i])) {
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SemaphoreP_post(writeSem);
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return (NVS_STATUS_INV_WRITE);
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}
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}
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}
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dstBuf = (uint8_t *)((uint32_t)(hwAttrs->regionBase) + offset);
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srcBuf = buffer;
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memcpy((void *) dstBuf, (void *) srcBuf, bufferSize);
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SemaphoreP_post(writeSem);
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return (NVS_STATUS_SUCCESS);
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}
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/*
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* ======== checkEraseRange ========
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*/
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static int_fast16_t checkEraseRange(NVS_Handle handle, size_t offset, size_t size)
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{
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NVSRAM_Object *object = handle->object;
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NVSRAM_HWAttrs const *hwAttrs = handle->hwAttrs;
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if (offset != (offset & object->sectorBaseMask)) {
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/* poorly aligned start address */
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return (NVS_STATUS_INV_ALIGNMENT);
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}
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if (offset >= hwAttrs->regionSize) {
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/* offset is past end of region */
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return (NVS_STATUS_INV_OFFSET);
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}
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if (offset + size > hwAttrs->regionSize) {
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/* size is too big */
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return (NVS_STATUS_INV_SIZE);
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}
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if (size != (size & object->sectorBaseMask)) {
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/* size is not a multiple of sector size */
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return (NVS_STATUS_INV_SIZE);
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}
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return (NVS_STATUS_SUCCESS);
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}
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/*
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* ======== doErase ========
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*/
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static int_fast16_t doErase(NVS_Handle handle, size_t offset, size_t size)
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{
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void * sectorBase;
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int_fast16_t rangeStatus;
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NVSRAM_HWAttrs const *hwAttrs = handle->hwAttrs;
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/* sanity test the erase args */
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rangeStatus = checkEraseRange(handle, offset, size);
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if (rangeStatus != NVS_STATUS_SUCCESS) {
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return (rangeStatus);
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}
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sectorBase = (void *) ((uint32_t) hwAttrs->regionBase + offset);
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memset(sectorBase, 0xFF, size);
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return (NVS_STATUS_SUCCESS);
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}
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